Voltage regulators that provide AC/DC rectification typically include a full wave voltage rectifier stage, such as, for example, a diode bridge, a main Switch Mode Power Supply (SMPS) stage, and a Power Factor Correction (PFC) stage inserted between the line and the main SMPS. The SMPS provides regulation of an output waveform and the PFC stage draws a sinusoidal current from the line and provides Direct Current (DC) voltage to the main SMPS. Depending on the desired output power, the PFC stage may include a large inductor. However, large inductors are unsuitable for use in systems such as, for example, Liquid Crystal Display (LCD) television power supplies, in which it is desirable to use components having low profiles. To decrease the size of the magnetic components of a PFC stage and thereby lower their profile, manufacturers split the PFC stage into smaller parallel sub-stages that operate out of phase from each other. When the PFC stage is split into two parallel sub-stages they operate 180 degrees out of phase from each other. This configuration is referred to as being an interleaved PFC. Generally, the two PFC sub-stages operate in Critical Conduction Mode (CRM). Because the two PFC sub-stages are out-of-phase from each other, the total input current has the shape of a continuous conduction mode PFC which results in a lower input/output Root Mean Square (RMS) current and easier Electromagnetic Interference (EMI) filtering of the power supply.
In SMPS stages it is important to protect transistors such as power Metal Oxide Semiconductor Field Effect Transistors (MOSFETS) from over current conditions. This may be accomplished by comparing the current flowing through the power MOSFETS with a reference current. If the current is too high, the MOSFETS are turned off. For an interleaved PFC stage, there are two current branches operating independently with a 180 degree phase shift, where each current branch is driven by a MOSFET. If there are two input/output pins, each current branch is associated with a corresponding input/output pin. If a current is too high in a current branch, the controller of the PFC turns off the MOSFET associated with that current branch. If there is a single current sense input/output pin, the current sensed is the total current flowing through both power MOSFETS. When the total current exceeds the reference limit, both MOSFETS are turned off at the same time. Because the two MOSFETs operate out of phase, the current may not be equally distributed between them at the moment the over current is detected. For example, one MOSFET may be conducting most of the current whereas the other MOSFET conducts almost zero current. Thus, during an over current event, one phase delivers all the power while the other phase provides almost none of the power. A disadvantage of this is that it leads to inefficient operation of the power supply, e.g., the power supply may have a longer startup time or poor current conduction.
Accordingly, it would be advantageous to have a circuit and method for protecting the MOSFETS from an over current event. It would of further advantage for the circuit and method to improve the current sharing of the PFC branches during an over current event.